Here's a selection of possible bachelor and master topics. If you're interested in one of them, don't hesitate to contact us! We'll sit down, have tea, and talk about what we great things we could do together.
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Advisors: Ulf Rüegg, Christoph Daniel Schulze.
- Tight Packing of Connected Components (Bachelor)
Different connected components of a graph are often laid out separately and combined again afterwards. This combination step often produces too much whitespace. Research relevant 2D packing literature and implement a better solution.
- KIPRA-1262Getting issue details... STATUS
- KIPRA-1031Getting issue details... STATUS
- Integrate KIML with JGraph (Bachelor)
Provide automatic layout through KIML for the JGraph diagram library and develop a simple JGraph-based graph editor to test the integration with.
- KIPRA-1214Getting issue details... STATUS
- Improved Edge Label Placement (Bachelor)
Our layout algorithm already supports the placement of edge labels. However, there's still room for improvement...
- Layering Algorithms (Bachelor, Master)
Implement an alternative algorithm for the layer assignment problem used in the layer-based approach to graph layout. The focus of the algorithm could the consideration of the number of edge crossings, a given aspect ratio, or overall compactness.
- Orthogonal "Edge Bundling" (Bachelor, Master)
Implement and evaluate strategies for orthogonal edge bundling within our layer-based layout algorithm.
- Node Placement With a Focus on Compactness (Master)
Node placement algorithms often try to draw as many edges as straight lines as possible. However, that usually results in less compact diagrams. The focus of this topic would be to devise or adapt a node placement algorithm that tries to strike a balance between straightness and compactness.
- Compound Graph Layout (Master)
Design and implement new concepts for computing layer-based layouts of compound graphs. The main focus shall be on maintainability: ensuring that the implementation can be kept working over the years. The main area to be considered here is the crossing minimization phase.
- Force Based Drawing with Port Constraints (Master)
Develop methods for integrating port constraints in force-based drawing approaches. The resulting node placement shall be evaluated using an edge router such as libavoid on the model library of Ptolemy.
- Combining Forces and Layers (Master)
Design and implement a layout algorithm that combines the force-based and the layer-based approaches. The first three phases of the layer-based approach shall be replaced by a node distribution computed with a force-based approach.
Advisors: Reinhard von Hanxleden, Ulf Rüegg, Christoph Daniel Schulze.
- Control Flow Graph Exploration / Visualization (Bachelor)
Use pragmatics concepts (automatic layout, focus & context) for exploring/visualizing control flow graphs and specific paths, eg. as computed by OTAWA WCET analysis tool, eg. using KLighD.
- Compound Graph Exploration (Bachelor, Master)
A new graph exploration approach should be examined which is uses different zoom levels for different compound nodes. This tries to map the "Google Maps approach" of only showing the information of interest at any given zoom level to the field of graph exploration.
Semantics and Synchronous Languages
Advisors: Christian Motika, Steven Smyth
- Automatic documentation generation for model-based languages (Bachelor)
Develop an automatic SCCharts documentation & comment system
- Merging SCCharts and KLOTS (Bachelor)
Implement KLOTS as demonstrator extension of the KIELER SCCharts implementation
- On the usability of the KIELER SCCharts compiler (Bachelor)
Evaluate the actual implementation of the KIELER SCCharts compiler and provide suggestions for improvements, i.e. the usability as standalone (commandline) compiler
- Validation Manager for Models (Bachelor/Master)
Develop an integrated, flexible and generic syntactic validation framework for models (e.g. Esterel or SyncCharts).
- SCCharts compiler validation with Esterel (Bachelor/Master)
Automate the validation of the SCCharts compiler using the Esterel simulation.
- Transformation from SCCharts to Esterel (Bachelor/Master)
Develop a transformation in Xtend2 to generate Esterel code for SCCharts.
- Hardware Synthesis from SCCharts to FPGA (Bachelor/Master)
Use the circuit-based code generation approach to produce code for FPGAs
- Optimization of the SCCharts compiler (Bachelor/Master)
Profile the actual SCCharts compiler and apply optimizations; also evaluate the possibility to use multiple cores for compilation
- Optimization of the SCCharts transformations (Bachelor/Master)
Profile the actual SCCharts transformations and apply optimizations
- SCCharts Andriod backend for Mini Drones (Bachelor/Master) [work in progress, Bachelor/Master project summer term 2015]
Develop a new code generation backend for SCCharts for Andriod applications with Mini Drones as demonstrator
- On the pragmatics of modelling large models in SCCharts (Bachelor/Master)
Evaluate the possibilities to create and maintain large models in model-based languages (i.e. SCCharts) and provide suggestions for improvements
- Extend the SC MoC to handle priority-based variable accesses (Bachelor/Master)
Add priorities to variable accesses to extend the SC MoC and therefore the number of valid sequentially constructive synchronous programs.
- Detecting tick boundaries in SCCharts (Master/Bachelor)
Implement an algorithm that detects tick boundaries (in concurrent) threads and therefore improves the scheduling
- Efficient data dependency analyses in SCCharts (Master/Bachelor)
Implement data dependency analyses for SCCharts to improve static scheduling of the compiler
- KIELER evaluation environment for synchronous languages (Master/Bachelor)
Develop a reliable evaluation environment to compare common synchronous languages (i.e. Esterel/SyncCharts & SCCharts)
- Raceyard evaluation (Master/Bachelor)
Evaluate the possibility for the use of SCCharts in the Raceyard context and pave the way for future experiments
- Quartz (Master)
Integrate the synchronous Quartz language into KIELER for validation purposes and teaching.
- Implementation of a priority-based compilation approach (Master) [work in progress, Caroline Butschek]
Implement the SyncCharts priority-based compilation approach into the SCCharts compiler chain.
- From Esterel to SCL (Master) [work in progress, Karsten Rathlev]
Implement transformations that translate Esterel programs to SCL
- Curing Schizophrenia in SCCharts (Master)
Develop new synchronizer to handle schizophrenia properly (e.g. depth join).
- Railway 4.0 (Master) [work in progress, Nis Wechselberg]
Design a new and modern hardware controlling (Version 4) for the railway installation.
PRETSY / PRETSY2
Advisors: Insa Fuhrmann, Steven Smyth
- Real-time extensions for SCCharts (Bachelor/Master)
Make the timing instructions delay_until und exception_on_expire of the FlexPRET processor available in SCCharts.
- Adding dataflow to SCCharts (Bachelor/Master) [work in progress, Axel Umland]
Add dataflow to SCCharts
- Multithreaded/Multicore execution of SCCharts (Master/Bachelor) [work in progress, Tibor Weiß]
Evaluate possibilities to preserve parallelism in SCCharts, implement mapping for (fine grained) multithreading and multicore
based on the FlexPRET processor.
Advisors: to be determined.
- Developing an Info Screen (Bachelor)
Info screens are screens that present data in ways that can be easily understood. This includes static data (project description graphics, members of a team, ...) as well as dynamically aggregated data (bug statistics, automatic build overviews, ...). This topic is about developing such an info screen for our group and making it easily configurable.