Versions Compared

Key

  • This line was added.
  • This line was removed.
  • Formatting was changed.

...

SlotProcessorTested
Before phase 1

Compound Cycle Processor
Graph Transformer
Comment Preprocessor
Edge And Layer Constraint Edge Reverser

(error)
(error)
(error)
(tick)
Before phase 2Big Nodes Processor
Label Dummy Inserter
(error)
(error)
Before phase 3

Layer Constraint Processor
Hierarchical Port Constraint Processor
Compound Dummy Edge Remover
Long Edge Splitter
Port Side Processor
Label Dummy Switcher
Inverted Port Processor
Self Loop Processor
Port List Sorter
North South Port Preprocessor

(tick)
(error)
(error)
(tick)
(tick)
(error)
(tick)
(error)
(tick)
(error)
Before phase 4

Subgraph Ordering Processor
In Layer Constraint Processor
Hyperedge Dummy Merger
Label Side Selector
Label And Node Size Processor
Node Margin Calculator
Compound Side Processor

(error)
(error)(tick)
(error)
(tick)*
(error)
(error)(tick)
(error)
Before phase 5

Layer Size and Graph Height Calculator
Hierarchical Port Dummy Size Processor
Hierarchical Port Position Processor

(error)
(error)
(error)
After phase 5

Comment Postprocessor
Hypernode Processor
Hierarchical Port Orthogonal Edge Router
Long Edge Joiner
North South Port Postprocessor
Label Dummy Remover
Reversed Edge Restorer
Compound Graph Restorer
Graph Transformer
End Label Processor

(error)
(error)
(error)
(tick)
(tick)*
(tick)*
(tick)
(error)
(error)
(error)

Contents

Table of Contents
maxLevel2

...

Preconditions
  • The graph is layered.
  • Crossing minimization is finished.
Postconditions
  • Nodes may have been reordered to match in-layer constraints.
SlotBefore phase 4.
DependenciesNone.
Remarks
  • Crossing minimizers that don't support in-layer constraints must include a dependency on this processor. Other crossing minimizers should not depend on it.
Tests
  • Nodes that hold a InLayerConstraint are ordered according to that property (i.e. first TOP, then NONE, then BOTTOM).

Inverted Port Processor

Inserts odd port side dummy nodes to cope with odd port sides. Odd port sides are the eastern side for input ports and the western side for output ports. In both cases, the incoming or outgoing edges have to be routed around the node.

...

Preconditions
  • The graph is layered.
  • Port positions are fixed.
Postconditions
  • Node margins are properly set to form a bounding box around the node and its ports and labels.
SlotBefore phase 4.
Dependencies
  • LabelAndNodeSizeProcessor
RemarksNone.
Tests
  • The margins property of a node is not null and every value is greater or equal to 0.
  • Ports located outside the node's bounding box are fully contained by the bounding box plus margin.

North South Port Postprocessor

...