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Table of Contents
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Processor Documentation

Edge And Layer Constraint Edge Reverser

Edge constraints affect if a node may have only incoming or only outgoing edges. This processor reverses edges if necessary to respect the edge constraints.

Layer constraints can be seen as implicit edge constraints. If a node should be placed in the first layer, it may have only outgoing edges. Similar for the last layer.

Preconditions

  • The graph is not layered yet.

Postconditions

  • Nodes with edge or layer constraints have only incoming or only outgoing edges, as appropriate.

Slot

Before phase 1.

Dependencies

None.

Remarks

  • Layerers should usually include a dependency on this processor.

Hierarchical Port Constraint Processor

This processor is concerned with hierarchical ports.

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  • For graphs with port constraints at least at FIXED_ORDER, northern and southern hierarchical port dummies are handled.

Slot

Before phase 3.

Dependencies

  • LayerConstraintProcessor?

Remarks

  • This processor is necessary to ensure proper functioning of the HierarchicalPortOrthogonalEdgeRouter.

Hierarchical Port Dummy Size Processor

Sets the width of hierarchical port dummy nodes.

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  • This processor is required for HierarchicalPortOrthogonalEdgeRouter to function properly.

Hierarchical Port Orthogonal Edge Router

After edge routing, edges have only been routed inside the graph. What remains to be done is to route the edges to the hierarchical ports. This processor does just that, using an orthogonal edge routing approach. During that process, hierarchical port dummy nodes that map onto hierarchical port are assigned the coordinates of the hierarchical port, relative to the graph's content area and already corrected for the offset. The necessary bend points are added to the edges connected to hierarchical ports. Hierarchical port dummy nodes that don't map onto a hierarchical port are removed, their incident edges connected to the appropriate hierarchical port dummy node representing a hierarchical port.

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  • For anything other than free port constraints, this processor requires that ConstrainedHierarchicalPortProcessor has executed.
  • This processor requires that HierarchicalPortDummySizeProcessor has executed.

Hierarchical Port Position Processor

If port constraints are set to at least FIXED_RATIO, the node placement phase is not free to position external port dummies at will. If the node placement algorithm doesn't support fixed positions, including a dependency on this processor fixes the y positions of external port dummies representing western or eastern ports.

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  • If northern or southern external edge routing modifies the height of the diagram, the dummy node positions become invalid in the FIXED_RATIO case. They are then recomputed by the HierarchicalPortOrthogonalEdgeRouter.

Hyperedge Dummy Merger

Merges long edge dummy nodes with edges originally coming from the same port or going into the same port. The idea is to reduce the amount of edges in the diagram as much as possible.

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  • This processor only makes sense if the LongEdgeSplitter was used before.

In-Layer Constraint Processor

Makes sure that in-layer constraints are respected. This processor is only necessary for crossing minimizers that don't respect in-layer constraints.

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  • Crossing minimizers that don't support in-layer constraints must include a dependency on this processor. Other crossing minimizers should not depend on it.

Inverted Port Processor

Inserts odd port side dummy nodes to cope with odd port sides. Odd port sides are the eastern side for input ports and the western side for output ports. In both cases, the incoming or outgoing edges have to be routed around the node.

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  • The following phases must support in-layer connections for this to work.

Layer Constraint Processor

Nodes can have a property associated with them that restricts the layers they can be placed in. They can be forced in the first or the last existing layer. They can also be forced into a newly created first or last layer, along with all other nodes with the appropriate property set. While they may not be treated differently by the layerer, this processor moves them into the layer they should be placed in. A node placed in the first layer must have only outgoing edges; similarly, nodes placed in the last layer must have only incoming edges. This processor assumes that as a precondition.

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  • Layerers should usually include a dependency on this processor, unless they already adhere to layer constraints themselves.
  • The LayerConstraintEdgeReverser ensures that this processor's preconditions are met. Thus, layerers should also include a dependency on that processor.

Long Edge Joiner

Removes all long edge dummy nodes, joining their edges together.

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  • Since there are multiple processors that generate long edge dummies, this processor doesn't only make sense if the LongEdgeSplitter was used before.

Long Edge Splitter

Turns a layered graph into a properly layered graph by inserting long edge dummies where appropriate..

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  • LayerConstraintProcessor

Remarks

None.

Node Margin Calculator

Calculates node margins based on port positions and sizes and label positions and sizes.

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  • PortPositionProcessor

Remarks

None.

North South Port Postprocessor

Removes north / south port dummy nodes and routes the edges properly.

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  • This processor only makes sense if the NorthSouthPortPreprocessor was used before.

North South Port Preprocessor

Inserts dummy nodes to cope with northern and southern ports. Dummy nodes are assigned to layout groups identified by the node whose ports they were created from. Also, node successor constraints are set to keep north / south port dummy nodes in a certain order. This processor is capable of processing self-loops connecting two northern or two southern ports. For other kinds of self-loops, the SelfLoopProcessor may be required.

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  • The dummy nodes must later be postprocessed by NorthSouthPortPostprocessor.
  • A crossing minimizer must support layout groups and node successor constraints.

Port List Sorter

If a node already has a fixed port order, its port lists are sorted accordingly.

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  • It may make sense to use this processor in multiple slots. Once to ensure fixed port sides, once more to sort the port lists again for nodes that have just had their port orders fixed.

Port Position Processor

Calculates the exact coordinates a ports.

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Dependencies

None.

Remarks

None.

Port Side Processor

Ensures that nodes have at least fixed port sides.

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Dependencies

None.

Remarks

None.

Reversed Edge Restorer

Restores the direction of reversed edges.

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  • Note that this processor doesn't have any dependencies. Let's take a long edge that was reversed during phase 1 and then split into multiple segments by the LongEdgeSplitter. All the edges generated by that processor inherit the REVERSED property of the original long edge. Thus, it doesn't make any difference if we reverse all those edges before joining them to the original long edge, or if we join them first and reverse the original long edge afterwards.

Self Loop Processor

Does some work that enables the other processors and phases to handle self-loops. To handle them well, the NorthSouthPortPreprocessor may be required.

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Dependencies

  • InvertedPortProcessor

Compound Cycle Processor

Removes cyclic dependencies between compound nodes from the graph. Adds dummy edges that enhance the layering with respect to hierarchy crossing edges: the Compound Cycle Processor determines an ancestor for each source and target of the edge such that both ancestors share a common parent. The source ancestor is to be put in layers left of the layers spanned by the target ancestor.

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The addition of dummy edges for the layering phase could be done after the cycle removal phase. However, the Compound Cycle Processor already performs some calculations needed for this task, which are directly reused.

Compound Dummy Edge Remover

Removes the dummy edges that were inserted during compound graph import or by the Compound Cycle Processor to implement constraints for the layering phase.

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Before phase 3.

Dependencies

None.

Compound Side Processor

Sets up dummy nodes at the sides of a compound node, connects these nodes with dummy edges. Those dummy nodes and edges are used to determine and reserve drawing space for the upper and lower segments of the bounding rectangles for compound nodes. The Linear Segments Node Placer arranges the dummy nodes in straight lines.

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None to other intermediate processors. The node placement is expected to put side dummy segments in line, though.

Subgraph Ordering Processor

Postprocesses the node ordering phase to ensure that subgraphs are not intertwined across the layers.

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After phase 3.

Dependencies

None.

Compound Graph Restorer

Determines positioning and size of the compound nodes according to the positioning of their dummy nodes and stores the information with the Left Compound Border dummy nodes. Transfers adjacency edges from Left Compound Port, Right Compound Port, and Right Compound Border dummy nodes to the Left Compound Border dummy nodes. Removes all dummy edges and dummy nodes apart from upper compound border dummy nodes from the graph.

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After phase 5.

Depencencies