David Harel. Statecharts: A visual formalism for complex systems, Science of Computer Programming, 8(3):231-274, June 1987.
Sequentially Constructive MoC
In contrast to SyncCharts (see  Charles André) a signal (or variable) in SCCharts is allowed to be emitted with different values in the same macro tick (if the emissions are schedulable according to the SC MoC). The following example is forbidden in SyncCharts but not in SCCharts.
SyncCharts: x cannot be absent and present in the same macro tick.
SCCharts: Deterministic ordering possible: If x is false then take the transition and set x to true.
Core & Extended SCCharts
A core SCChart is composed of elements of a minimal set of constructs. Additional constructs and syntactical sugar (f.e. actions, suspend) are introduced in extended SCCharts. Every extended SCCharts can be transformed into a core SCChart.
|Core SCChart||Extended SCCharts||Graphical comparison|
Core SCCharts +
[click to enlarge]
Modeling & Compiling SCCharts
SCCharts can be modeled using our KIELER SCChrats editor and compiler (download). The modeling editor is a textual editor based on the itemis Xtext framework. The language used to model SCCharts textually is called SCT and documented here. A quick start guide introducing first steps from downloading over modeling to compiling SCCharts can be found here.
|SCCharts Editor (*.sct)||Implemented and tested||0.9.0|
|SCG Editor||Implemented and tested||0.9.0|
|SCL Editor||Implementation not yet finished|
|Extended 2 Core SCCharts||Implemented, not yet fully tested||0.9.0|
|Core 2 Normalized SCCharts||Implemented, not yet fully tested (some known bugs)||0.9.0|
|Normalized SCCharts 2 SCG||Implemented, not yet fully tested (some known bugs)||0.9.0|
|SCG 2 Sequential SCG|
Implemented and partly tested,
straightforward scheduler for 0.9.0 release,
enhanced scheduler planned for 0.10.0 release.
|SCG 2 C|
Implemented by transformation via common S language
(this can also be translated into Java -> SJL)
|Online Compiler and Command Line Tools||Implemented and partly tested||0.10.0|
|Simulation||Implemented and partly tested||0.10.0|
|Hardware Circuit Synthesis and Simulation||Implemented and partly tested||0.11.0|
- Normalization may result in conditions where there actually is no conditions, this should optimized manually
- SCG Generation currently produces unoptimized hierarchy levels, e.g., fork nodes with just one successor node should be eliminated
- Scheduling of unconnected SCG exit nodes is currently not possible